Questa Design Unit Coverage

Design Unit: work.register_file_tb


Design Unit Coverage Details:

Total Coverage:96.87%87.50%
Coverage TypeBinsHitsMissesWeight% HitCoverage
Statements282801100.00%100.00%
Toggles431175.00%75.00%

Scope Details:

Design Unit Name:
work.register_file_tb
Language:
SystemVerilog
Source File:
testbench/register_file_tb.sv