Questa Design Coverage

Scope: /register_file_tb/writeAndRead


Local Instance Coverage Details:

Total Coverage:100.00%100.00%
Coverage TypeBinsHitsMissesWeight% HitCoverage
Statements262601100.00%100.00%

Scope Details:

Instance Path:
/register_file_tb/writeAndRead
Language:
SystemVerilog
Source File:
testbench/register_file_tb.sv