Questa Design Unit Coverage

Design Unit: work.alu


Design Unit Coverage Details:

Total Coverage:79.03%67.67%
Coverage TypeBinsHitsMissesWeight% HitCoverage
Statements282801100.00%100.00%
Branches22193186.36%86.36%
Conditions12210116.66%16.66%
UDP----------Excluded
FEC12210116.66%16.66%

Scope Details:

Design Unit Name:
work.alu
Language:
SystemVerilog
Source File:
source/alu.sv